The trend in the design of switching mode power supplies has been toward relatively low power loss, low ripple and low noise under light load condition, especially for those widely used adaptors for notebooks, computers, and chargers for mobile telecommunication apparatus. This kind of power supplies frequently operates under a light or zero load condition, which is named as the standby operation mode.
A flyback converter is the most commonly used topology for this application with pulse width modulation (PWM) control for the output regulation. To achieve relatively very low power loss under light or open load condition, it is the key factor to control the power stage to operate at a relatively very low switching frequency to decrease the switching loss and driving loss of the generally used MOSFET power switch. Meanwhile, the control circuit dissipates relatively low loss due to relatively low frequency operation.
The conventional PWM controller circuit according to the general prior art always operates at a constant frequency, corresponding to the switching period T as shown in FIG. 1, which shows the operating PWM signal for the normal and standby operation mode respectively. The power circuit operates with relatively a long on time PWM, Ton,nor, and thus a high duty cycle under normal load condition. In the standby operation mode, the power circuit always operates with relatively a very short time Ton,sb and thus a very small duty cycle, but the switching frequency is still high as normal operation, resulting in relatively much switching loss and driving loss of the main switch and much power loss of the controller which are the major parts of the standby loss. Therefore, the standby loss of the converter will be relatively high. However the advantage of the PWM controller circuit is that the output ripple and noise are relatively very low even at the standby operation mode.
Moreover, there are generally two methods to decrease the switching related loss which is the main component of the standby loss. One is to decrease the switching frequency by regulating the Toff time of the PWM signal while keeping a constant Ton time of the PWM signal for standby operation. Please refer to FIG. 2. In the standby operation mode, the constant switching on time of PWM signal is Ton,sb, which is equal to the counterpart Ton,nor for the normal operation mode. But the Toff time is regulated as Toff,sb, which is relatively much longer than that Toff,nor for the normal operation mode. As a result, the switching period is relatively much longer than that of the normal operation mode and the switching frequency is relatively much lower which benefits to the relatively low standby loss in the standby operation mode as mentioned before.
One drawback of this control method is that the conversion power at each switching cycle will be relatively high due to the constant on time of the PWM signal in the standby operation mode. Therefore, relatively high output voltage noise and even audible noise might be introduced to the converter though the standby loss can be effectively reduced.
The other method is a burst mode control for the standby operation mode. Please refer to FIG. 3 for the operation PWM signal with this control mode. In the normal operation mode, the PWM signal is relatively with a high frequency and long on time as Ton,nor. In the standby operation mode, the on time of PWM signal can be regulated relatively short as Ton,sb at each switching period, but after several continuous switching periods, some switching periods will be skipped. Therefore, in the standby operation mode, the equivalent switching period will be Tsb/n, where n is the numbers of PWM pulses during the Tsb time. It can be seen that, in the standby operation mode, the equivalent switching period of the PWM signal is longer than that of the normal operation mode. So, the switching related loss can be effectively reduced and thus the relatively low standby loss can be achieved.
But there are problems with this control mode also. In the standby operation mode, the conversion power of the converter during the several continuous switching periods with PWM pulses will be relatively high, resulting in relatively high output voltage noise. Meanwhile, the several continuous switching periods with PWM pulses occur during a relatively long Tsb period corresponding to a relatively low frequency. This will also introduces the audible noise to the converter.
It is therefore attempted by the applicant to deal with the above situation encountered with the prior art.